Philips php4n50e 1 free download

File name php4n50e_1.pdf

Philips Semiconductors Objective specification PowerMOS transistor PHP4N50E GENERAL DESCRIPTION QUICK REFERENCE DATA N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT field-effect power transistor in a plastic envelope featuring high VDS Drain-source voltage 500 V avalanche energy capability, stable ID Drain current (DC) 5.3 A blocking voltage, fast switching and Ptot Total power dissipation 100 W high thermal cycling performance RDS(ON) Drain-source on-state resistance 1.5 with low thermal resistance. Intended for use in Switched Mode Power Supplies (SMPS), motor control circuits and general purpose switching applications. PINNING - TO220AB PIN CONFIGURATION SYMBOL PIN DESCRIPTION d tab 1 gate 2 drain g 3 source tab drain 1 23 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS Drain-source voltage - 500 V VDGR Drain-gate voltage RGS = 20 k - 500 V